Just got logged in automatically as another user?

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  • Rogueywon 16 Jun 2013 10:21:38 5 posts
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    Registered 9 years ago
    Something very odd going on today. Just made a comment on a thread - and noticed it was showing up as having come from a User Who Is Not Me (TM). Then noticed I was logged in as that user. Have logged back in as myself now, but that's a little alarming, to put it mildly.

    Something going wrong in your backend, EG?
  • bitch_tits_zero_nine 16 Jun 2013 10:23:43 6,654 posts
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    say something racist. The most offensive thing you can think of. see if you can get the lad banned in 5 posts.
  • Dirtbox 16 Jun 2013 10:28:09 76,376 posts
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    Where did bitch_tits_zero_nine go?

    +1 / Like / Tweet this post

  • bitch_tits_zero_nine 16 Jun 2013 10:28:40 6,654 posts
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    :D
  • lucky_jim 16 Jun 2013 10:45:59 5,164 posts
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    Someone was complaining about this in a comments thread the other day. Sounds like a pretty urgent problem, as I'm guessing you can access the info on a user's profile that they might have chosen not to make public (such as email addresses).
  • monkehhh 16 Jun 2013 11:00:54 3,145 posts
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    Been happening for a while and pretty urgently needs a fix (so, 2016 or so?). You can change emails and passwords from the profile screen without needing the original password, as far as I can tell, so this could be bad.
  • StarchildHypocrethes 16 Jun 2013 11:08:14 24,607 posts
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    The good news with EG is that they don't like to change the "features" they offer too regularly, so you can really get used to them.
  • YoshiMcTaggis 16 Jun 2013 11:09:41 2,457 posts
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    God I really hope I get logged in as Ecosse
  • M83J01P97 16 Jun 2013 11:51:33 6,391 posts
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    This happened to me earlier in the week and without naming any names, some members of this forum like to engage in a little mild to heavy role play as their favourite Final Fantasy characters via PM's.

    You know who you are ;)

    Edited by M83J01P97 at 11:52:07 16-06-2013
  • SuperCoolEskimo 16 Jun 2013 12:01:10 9,542 posts
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    ?
  • jonsaan 16 Jun 2013 12:06:24 25,256 posts
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    That jonsaan is a right fucking twat!

    FCUTA!

  • jonsaan 16 Jun 2013 12:06:40 25,256 posts
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    Hey!

    FCUTA!

  • RobTheBuilder 16 Jun 2013 12:10:08 6,521 posts
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    First edition Cell on 90 nm CMOS

    IBM has published information concerning two different versions of Cell in this process, an early engineering sample designated DD1, and an enhanced version designated DD2 intended for production.

    Known Cell Variants in 90 nm Process
    Designation Die Area First Disclosed Enhancement
    DD1 221 mm˛ ISSCC 2005
    DD2 235 mm˛ Cool Chips April 2005 enhanced PPE core

    The main enhancement in DD2 was a small lengthening of the die to accommodate a larger PPE core, which is reported to "contain more SIMD/vector execution resources"[1]. Some preliminary information released by IBM references the DD1 variant. As a result some early journalistic accounts of the Cell's capabilities now differ from production hardware.

    Cell floorplan

    [Powerpoint material accompanying an STI presentation given by Dr Peter Hofstee], includes a photograph of the DD2 Cell die overdrawn with functional unit boundaries which are also captioned by name, which reveals the breakdown of silicon area by function unit as follows:



    Cell Function Units and Footprint
    Cell function unit Area (%) Description
    XDR interface 5.7 interface to Rambus system memory
    memory controller 4.4 manages external memory and L2 cache
    512 KiB L2 cache 10.3 cache memory for the PPE
    PPE core 11.1 PowerPC processor
    test 2.0 unspecified "test and decode logic"
    EIB 3.1 element interconnect bus linking processors
    SPE (each) x 8 6.2 synergistic coprocessing element
    I/O controller 6.6 external I/O logic
    Rambus FlexIO 5.7 external signalling for I/O pins


    SPE floorplan

    Additional details concerning the internal SPE implementation have been disclosed by IBM engineers, including Peter Hofstee, IBM's chief architect of the synergistic processing element, in a scholarly IEEE publication.[2]

    This document includes a photograph of the 2.54 x 5.81 mm SPE, as implemented in 90-nm SOI. In this technology, the SPE contains 21 million transistors of which 14 million are contained in arrays (a term presumably designating register files and the local store) and 7 million transistors are logic. This photograph is overdrawn with functional unit boundaries, which are also captioned by name, which reveals the breakdown of silicon area by function unit as follows:

    SPU Function Units and Footprint
    SPU function unit Area (%) Description Pipe
    single precision 10.0 single precision FP execution unit even
    double precision 4.4 double precision FP execution unit even
    simple fixed 3.25 fixed point execution unit even
    issue control 2.5 feeds execution units
    forward macro 3.75 feeds execution units
    GPR 6.25 general purpose register file
    permute 3.25 permute execution unit odd
    branch 2.5 branch execution unit odd
    channel 6.75 channel interface (three discrete blocks) odd
    LS0-LS3 30.0 four 64 KiB blocks of local store odd
    MMU 4.75 memory management unit
    DMA 7.5 direct memory access unit
    BIU 9.0 bus interface unit
    RTB 2.5 array built-in test block (ABIST)
    ATO 1.6 atomic unit for atomic DMA updates
    HB 0.5 obscure
    Understanding the dispatch pipes is important to write efficient code. In the SPU architecture, two instructions can be dispatched (started) in each clock cycle using dispatch pipes designated even and odd. The two pipes provide different execution units, as shown in the table above. As IBM partitioned this, most of the arithmetic instructions execute on the even pipe, while most of the memory instructions execute on the odd pipe. The permute unit is closely associated with memory instructions as it serves to pack and unpack data structures located in memory into the SIMD multiple operand format that the SPU computes on most efficiently.
  • RobTheBuilder 16 Jun 2013 12:10:36 6,521 posts
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    Registered 9 years ago
    Uh oh
  • Syrette 16 Jun 2013 12:25:44 41,932 posts
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    Registered 11 years ago
    Rauper here

  • neilka 16 Jun 2013 12:36:49 14,978 posts
    Seen 1 hour ago
    Registered 9 years ago
    I'm 100% gay
  • Tryhard 16 Jun 2013 12:39:30 3,501 posts
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    Registered 3 years ago
    Is this me?

    I do not know anymore.

    No it is me,I still have my dick caught in my zipper.Phew.
  • uglygamer 16 Jun 2013 12:43:25 11,799 posts
    Seen 15 hours ago
    Registered 6 years ago
    Was it a mod account? You could have got rid of a few people ;)
  • DrStrangelove 16 Jun 2013 12:45:44 2,568 posts
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    Registered 5 years ago
    RobTheBuilder wrote:
    First edition Cell on 90 nm CMOS

    IBM has published information concerning two different versions of Cell in this process, an early engineering sample designated DD1, and an enhanced version designated DD2 intended for production.

    Known Cell Variants in 90 nm Process
    Designation Die Area First Disclosed Enhancement
    DD1 221 mm˛ ISSCC 2005
    DD2 235 mm˛ Cool Chips April 2005 enhanced PPE core

    The main enhancement in DD2 was a small lengthening of the die to accommodate a larger PPE core, which is reported to "contain more SIMD/vector execution resources"[1]. Some preliminary information released by IBM references the DD1 variant. As a result some early journalistic accounts of the Cell's capabilities now differ from production hardware.

    Cell floorplan

    [Powerpoint material accompanying an STI presentation given by Dr Peter Hofstee], includes a photograph of the DD2 Cell die overdrawn with functional unit boundaries which are also captioned by name, which reveals the breakdown of silicon area by function unit as follows:



    Cell Function Units and Footprint
    Cell function unit Area (%) Description
    XDR interface 5.7 interface to Rambus system memory
    memory controller 4.4 manages external memory and L2 cache
    512 KiB L2 cache 10.3 cache memory for the PPE
    PPE core 11.1 PowerPC processor
    test 2.0 unspecified "test and decode logic"
    EIB 3.1 element interconnect bus linking processors
    SPE (each) x 8 6.2 synergistic coprocessing element
    I/O controller 6.6 external I/O logic
    Rambus FlexIO 5.7 external signalling for I/O pins


    SPE floorplan

    Additional details concerning the internal SPE implementation have been disclosed by IBM engineers, including Peter Hofstee, IBM's chief architect of the synergistic processing element, in a scholarly IEEE publication.[2]

    This document includes a photograph of the 2.54 x 5.81 mm SPE, as implemented in 90-nm SOI. In this technology, the SPE contains 21 million transistors of which 14 million are contained in arrays (a term presumably designating register files and the local store) and 7 million transistors are logic. This photograph is overdrawn with functional unit boundaries, which are also captioned by name, which reveals the breakdown of silicon area by function unit as follows:

    SPU Function Units and Footprint
    SPU function unit Area (%) Description Pipe
    single precision 10.0 single precision FP execution unit even
    double precision 4.4 double precision FP execution unit even
    simple fixed 3.25 fixed point execution unit even
    issue control 2.5 feeds execution units
    forward macro 3.75 feeds execution units
    GPR 6.25 general purpose register file
    permute 3.25 permute execution unit odd
    branch 2.5 branch execution unit odd
    channel 6.75 channel interface (three discrete blocks) odd
    LS0-LS3 30.0 four 64 KiB blocks of local store odd
    MMU 4.75 memory management unit
    DMA 7.5 direct memory access unit
    BIU 9.0 bus interface unit
    RTB 2.5 array built-in test block (ABIST)
    ATO 1.6 atomic unit for atomic DMA updates
    HB 0.5 obscure
    Understanding the dispatch pipes is important to write efficient code. In the SPU architecture, two instructions can be dispatched (started) in each clock cycle using dispatch pipes designated even and odd. The two pipes provide different execution units, as shown in the table above. As IBM partitioned this, most of the arithmetic instructions execute on the even pipe, while most of the memory instructions execute on the odd pipe. The permute unit is closely associated with memory instructions as it serves to pack and unpack data structures located in memory into the SIMD multiple operand format that the SPU computes on most efficiently.
    lol I just intended to do the same. Beat me to it.
  • RobTheBuilder 16 Jun 2013 13:18:53 6,521 posts
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    Registered 9 years ago
    Thought I'd get it done sharpish for that reason!
  • TarickStonefire 16 Jun 2013 14:33:35 2,671 posts
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    RobTheBuilder wrote:
    Thought I'd get it done sharpish for that reason!
    I think I must be missing out on the greatest in-joke ever.

    Any Netflix library in the world for a couple of quid a month? Gimme!

  • kentmonkey 16 Jun 2013 16:12:22 20,105 posts
    Seen 4 hours ago
    Registered 9 years ago
    This has been pointed out before, numerous times, and in all honesty isn't really on.

    EG do, rightfully, like to shout out about when security loopholes have allowed people to access data they shouldn't have, but then, seemingly, knowingly allow this bug to exist for months without correcting it.

    Loads of stuff could be available, such as email addresses, locking out someone's account, access to data contained in PM's, which could be postal addresses for not only the account holder but others as well...it's not exactly a minor thing.

    Plus I'm fucking jealous I didn't get to see the FF role play pics.
  • OptimusPube 16 Jun 2013 16:17:56 2,427 posts
    Seen 7 hours ago
    Registered 2 years ago
    I like to wear ladies undergarments.

    Is it supposed to be like this?

  • RobTheBuilder 16 Jun 2013 16:20:53 6,521 posts
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    Registered 9 years ago
    TarickStonefire wrote:
    RobTheBuilder wrote:
    Thought I'd get it done sharpish for that reason!
    I think I must be missing out on the greatest in-joke ever.
    I just did the obligatory 'vizzini got logged in as me' joke. Nothing much
  • Load_2.0 17 Jun 2013 10:09:09 18,237 posts
    Seen 4 hours ago
    Registered 11 years ago
    I keep getting logged out.
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